Voltage: 5V
Bit: 32
IU (Integer Unit): 030 compatible
Caches: 4kb Instruction Cache, 4kb Data Cache  (simultaneous access)
MMU: Data MMU, Instruction MMU
FPU: Internal 68881/68882 compatible. Some instructions are emulated in
     software.

6 Stage Pipeline
Multiprocessor support via bus snooping.
4GB Direct Addressing Range

Known Versions
--------------

25Mhz (PGA)
33Mhz (PGA)
40Mhz (PGA)

Registers
---------

8 Data Registers (D0-D7) - 32bit
8 Address Registers (A0-A7) - 32bit
  NB. A7 is also USP (User Stack Pointer)
PC (Program Counter)
CCR (Condition Code Register)

FP Registers
------------

8 Floating Registers (FP0-FP7)
FPCR (Floating Point Control Register)
FPSR (Floating Point Status Register)
FPIAR (Floating Point Instruction Address Register)

Supervisor Mode Registers
-------------------------

ISP (Interrupt Stack Pointer) - 32bit
MSP (Master Stack Pointer) - 32bit
SR (Status Register) - 16bit
VBR (Vector Base Register) - 32bit
SFC (Source Function Code) - 32bit
DFC (Destination Function Code) - 32bit
CACR (Cache Control Register) - 32bit
URP (User Root Pointer)
SRP (Supervisor Root Pointer)
TC (Translation Control Register)
DTT0 (Data Transparent Translation Register 0)
DTT1 (Data Transparent Translation Register 1)
ITT0 (Instruction Transparent Translation Register 0)
ITT1 (Instruction Transparent Translation Register 1)
MMUSR (MMU Status Register)


For a complete user manual on this processor free of charge order M68040UM/AD
from Motorola's web site. Motorola


This has been used on many Amiga accelerator boards and in several Amigas
including various A4000 models and one A3000T model.